1. Technical Field
The present teaching relates generally to methods and systems for analog circuits. More specifically, the present teaching relates to methods and systems for sampling an input voltage and systems incorporating the same.
2. Discussion of Technical Background
Voltage sampling is a frequently used technology. One challenge is to sample an input voltage reliably, accurately and consistently. Various attempts have been made to provide designs to achieve that. There exist a number of prior art designs aimed at providing a circuit that can reliably sample an input voltage. One such circuit is described in U.S. Pat. No. 5,945,872 to Robertson. There are subsequent improvements made to the original Robertson circuit. See U.S. Pat. No. 6,060,937 and U.S. Pat. No. 6,118,326 to Singer et al. These prior art patents disclose circuits that aim at producing an improved MOS FET switch that operates on only two clock phases and enabling higher speed operation. There are various drawbacks of these prior art circuits. For example, these circuits can not accurately sample input voltages that are above the supply voltage (V++) at which the circuit operates. The reason is that they suffer from the body diode (n-well to p+) from the external pin to the on-chip circuitry. In fact, the presence of such diode prevents all of the previous attempts from sampling any voltage that is higher than the supply voltage (V++), which is used to bias the n-well (cathode) of the body diode.
Therefore, there is a need for a circuit that is capable of sampling any input voltage reliably and precisely. This includes sampling a voltage that is higher than the supply voltage. In addition, there is a need for a circuit that can sample any input voltage, including a voltage higher than the supply voltage, using a sampling device that has a constant switch-on resistance on the sampling device.